1. Field of the Invention
The present invention relates to an electrical connector for electrically connecting an electronic package such as a land grid array (LGA) chip with a circuit substrate such as a printed circuit board (PCB), and particularly to a connector having protrusions that minimize the risk of accidental damage to the associated electronic package.
2. Description of the Prior Art
Land grid array (LGA) electrical connectors are widely used in the connector industry for electrically connecting LGA chips to printed circuit boards (PCBs) in personal computers (PCs). As described in “Nonlinear Analysis Helps Design LGA Connectors” (Connector Specifier, February 2001, pp. 18-20), the LGA connector mainly comprises an insulative housing and a multiplicity of terminals. The housing comprises a multiplicity of terminal passageways defined therein in a generally rectangular array for interferentially receiving corresponding terminals. Due to the very high density of the terminal array in a typical LGA chip, the LGA chip need to be precisely seated on the LGA connector to ensure reliable signal transmission between the terminals and the LGA chip. Means for accurately attaching the LGA chip to the LGA connector are disclosed in U.S. Pat. Nos. 4,504,105, 4,621,884, 4,692,790, 5,302,853 and 5,344,334.
Referring to FIG. 8, a conventional connector 6 comprises an insulative housing 60 and a multiplicity of terminals 61 received therein. In forming the connector 6, a carrier strip (not shown) comprises a row of the terminals 61, and a row of connecting sections 610 respectively connecting the terminals 61 with a main body of the carrier strip. The housing 60 comprises four raised sidewalls 62, and a flat base 63 disposed between the four raised sidewalls 62. Four raised portions 630 are disposed upwardly around the flat base 63. Two opposite of the sides 62 each have a sloped surface that slants down toward the raised portion 630. The base 63 and the sidewalls 62 cooperatively define a space therebetween for receiving an LGA chip (not shown) therein. The base 63 defines a multiplicity of terminal passageways 64 for receiving the terminals 61 therein. When the LGA chip is seated on the LGA connector 6, the four raised portions 630 and the four sidewalls 62 can securely engage the LGA chip thereon and therebetween. The sloped surfaces provide additional space to manipulate a carrier strip to allow easy cutting off of connecting sections 610 from their corresponding terminals 61. However, the sloped surfaces diminish the original advantage of the sides 62 being raised. That is, a reduced surface area of the sides 62 is available to retain the LGA chip therebetween. This can adversely affect the reliability of signal transmission between the terminals 61 and the LGA chip.
FIG. 9 shows another conventional LGA connector 6′ devised to overcome the above-described problem. The LGA connector 6′ comprises a housing 60′ and a multiplicity of terminals 61′ received therein. A carrier strip (not shown) comprises a row of the terminals 61′, and a row of connecting sections 610′ respectively connecting the terminals 61′ with a main body of the carrier strip. The housing 60′ comprises a flat base 63′ and four raised sides 62′ surrounding the base 63′. Four raised portions 630′ are disposed upwardly around the base 63′. The base 63′ defines a square central cavity 631′ therein, and a multiplicity of terminal passageways 64′ regularly arranged in a generally rectangular array for interferentially receiving corresponding terminals 61′ therein. Two opposite of the sides 62′ each define a multiplicity of evenly spaced recesses 621′ therein, thereby forming a multiplicity of evenly spaced projections 620′. Each recess 621′ is bounded at a bottom thereof by a sloped surface of the sidewall 62′, such that an inner portion of the recess 621′ is disposed lower than an outer portion thereof. Accordingly, a side elevation cross section of each projection 620′ is trapezium-shaped. When terminals 61′ are installed near the projections 620′, a common carrier strip connecting the terminals 61′ is bent down so that connecting sections 610′ of the carrier strip are received in corresponding recesses 621′. Junction portions between the terminals 61′ and their respective connecting sections 610′ are cut, and a main body of the carrier strip having the connecting sections 610′ is removed. The recesses 621′ enable the carrier strip to be manipulated so that sufficient space is made available for cutting off of the connecting sections 610′ without interfering with the sidewall 62′ thereat. The projections 620′ and the four raised portions 630′ provide precise fitting positioning of the LGA chip therebetween and thereon. However, when a force is exerted down on the LGA chip to make each pad (not shown) of the LGA chip engage with the terminal 61′, the force is only supported by the four raised portions 630′ around the base 63′, which will make the middle portion of the LGA chip deformable downward. This can adversely affect the reliability of signal transmission between the terminals 61′ and the LGA chip.
Therefore, a new LGA electrical connector which overcomes the above-mentioned problems is desired.